SIS1100e PEX8311 V2 EEPROM File

Prefetchable base address capability has to be enabled on the PEX8311 PCI Express to local bus bridge chip to perform 64-bit direct master or DMA transfers. This is of relevance on machines from 4 GB of memory on. The corresponding bits can be set through the configuration EEPROM of the PEX8311. Units with serial number 94 and higher are shipped with this configuration. The EEPROM can be regrogrammed with the PLX Technology SDK.

An Archive with the PROM contents, instructions and software can be found here.

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SIS3153 Ethernet SFP reset issue serial numbers16-39

The SIS3153 Ethernet to VME interfaces with serial numbers in the range from 16 to 39 have a some 10% probability reset issue at power up.

Please have trained personel remove resistor R200A to remedy the erroneous pulldown.

USB3.0 operation is not affected.

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Rare I2C communication issue on DWC8300 R11

Rare difficulties with I2C user bus data Transfer upon
setting attenuators or reading I2C devices.

Fix: removal of capacitor C48 (by trained personnel)

Shipments from October 10th 2016 onwards will have C48 removed.

 

Temporary fix without Hardware modification:

Set DACA output to maximum output (3.3V)

 

DWC8300 R10 cards are not affected.

 

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XC18V04 Serial Prom IDCODE not recognized by Impact

SIS3100, SIS3300, SIS3301 SIS3820 and several other Struck boards use the Xilinx XC18V04 Serial PROM to hold the firmware that is uploaded to the FPGA at power up.

Depending on the Impact version and the Silicon of the XC18V04  you may get an error message indicating, that the IDCODE of your PROM does not meet the expectance.

INFO:iMPACT:583 – ‘2’: The idcode read from the device does not match the idcode   in the bsdl File.
INFO:iMPACT:1578 – ‘2’:  Device IDCODE :        00000101000000100110000010010011
INFO:iMPACT:1579 – ‘2’: Expected IDCODE:    00000101000000110110000010010011

You will want to locate and modify the xc18v04.bsd file:

..\ISE_DS\ISE\xc18v00\data\ xc18v04.bsd

Original:

attribute IDCODE_REGISTER of XC18V04: entity is

“XXXX” &                — version

“0101000000110110” &    — part number

“00001001001” &         — manufacturer’s id

“1”;                    — required by standard

New:

attribute IDCODE_REGISTER of XC18V04: entity is

“XXXX” &                — version

“01010000001X0110” &    — part number

“00001001001” &         — manufacturer’s id

“1”;                    — required by standard

You may want to refer to the URLs below also:

Xilinx Forum 1

Xilinx Forum 2

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SIS8300-L2 Firmware with PME_turn_off Workaround

The (non AXI) PCI Express endpoint of the Virtex 6 can be rendered inaccessible after a PME_turn_off command (from a CPU reboot). A core reset was added to the pcie_interface.vhd as a workaround in that situation with minor firmware revision 0x0E.

The ready to use PROM files for the DWC and SIS8900 versions can be dowloaded from:

SIS8300-L2 firmware page

URLs for the macro versions will be emailed on request.

We would like to thank the team at N.A.T for the support in locating the issue and testing the workaround implementation.

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TAMU SHE SIS3316 Si/YAP Readout Using HE and Trigger Mask Functionality

Super Heavy Element (SHE) production imposes stringent requirements on trigger generation. TAMU uses a set of four 16 channel 250 MSPS 14-bit SIS3316 digitizers to read out a setup consisting of YAP and Silicon detectors.

An advanced triggering scheme utilizing the more recent SIS3316 high energy trigger in combination with trigger mask functionality  is employed.

tamu-she-triggerblockdiagram

Link to TAMU SHE Blog entry

Thanks to Sara Wuenschel-Horn for the description of the setup.

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SIS8300-L2 Windows Labview Support

Fini Jastrow of DESY has developed a SIS8300-L2 VI, which is based on Struck’s single read, single write, DMA read and DMA write Windows Driver calls.

It is available to interested parties under the Lesser Gnu Public License (LGPL).

Screenshots of the menu, the running code and the block diagram are shown below.

sis8300-l2-lvmenue sis8300-l2-lvfront sis8300-l2-lvcode

Thanks a lot to Fini Jastrow for the contribution.

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Multiple SIS3316 Digitizer Readout Performance over 10G Ethernet Switch

GBit/s Ethernet readout of a 16 channel SIS3316 125/250 MSPS digitizer yields a block transfer throughput in excess of 80 MByte/s. Parallel readout of multiple SIS3316s over a 10 GBit/s (10G) switch into a computer with 10G Ethernet card is a method to build data acquisition setups with several 100 MByte/s of sustained throughput.

Note: both optical and copper SFP transceivers are supported on the SIS3316

The PDF below describes the performance of a 5 SIS3316 readout speed demonstration  setup with a Zyxel 10G Ethernet switch and a readout PC with 10G Ethernet card. Data rates in excess of 400 MByte/s are demonstrated.

SIS3316-M-0101-1-V100-10G-Switch-Test.pdf

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Windows (and LabVIEW) Support for SIS8300-x, SIS8325 and SIS8800 MTCA.4 cards

A signed Windows driver with the following functions is available:

open, close, single word read, single word write, DMA read, DMA write.

So far it is tested under Windows 7.

Mininmalistic LabVIEW VIs are available for that function set too.

A more extensive SIS8300-L2 VI is currently under development at a user site (we’ll keep you posted)

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Helmholtz Association gives Green light for industrial alliance “MicroTCA.4 Tech Lab”

Helmholtz Association promotes development of high-speed electronics Standard.

http://www.desy.de/news/news_search/index_eng.html?openDirectAnchor=1038&two_columns=1

Struck Innovative Systeme is proud to be one of the Partners of the  MicroTCA.4 Tech Lab

and is looking  forward to enable new applications and technologies on the base of the MTCA.4 Standard.

 

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