An issue with the CLKOUT5 output on some units in Distribution Clock Mode was reported on the more recent R13 and R13b revisions of the DS8VM1.
Installing 100 nF 0402 X7R capacitors on C17R1 (supplying VCC11 CLK4 DAC CLK of the LMK04906 chip) and C17S1 (supplying VCC12 CLK5 FPGA CLK) -similar to earlier revisions- fixes the anomaly.