PCI/cPCI-VME link/interface (SIS1100/3100)

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The SIS1100/SIS3100 PCI/cPCI to VME interface card combination was developed to meet the requirements of demanding VME data acquisition systems. The link is optimized for low latency high speed readout. Interaction with external logic is possible through optional input/output connectors on the VME side (SIS3100) of the link. The actual VME transactions are handled by a sequencer. The sequencer can execute VME cycles under PC program control or under control of the optional Digital Signal Processor (DSP).

The flexible FPGA based design allows for the implementation of the traditional VME cycles as well as more recent extensions to the standard, like 2eVME e.g.

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Picture of SIS1100/3100 with DSP, SDRAM and front panel I/O option

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SIS1100/SIS3100 system setup

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Properties of VME side:

(Base configuration)

  • Single width 6U VME master/system controller
  • VME sequencer
  • Mapping table with 64 entries
  • VME master A16/A24/A32/A40 D8/D16/D32/BLT32/MBLT64/2eVME
  • VME slave A32/D32/BLT32/MBLT64
  • Block transfer address auto increment on/off (for FIFO reads)
  • System controller function (can be disabled by jumper)
  • up to 450 m link distance (up to 20 km with long distance option)
  • EMC front panel
  • in field JTAG firmware upgrade capability
  • LED's

    A (access/slave) M (master)
    P (power) S (sequencer)
    R (ready) L (link up)
    LU (link data up) LD (link data down)
    U (user) DU (dsp user)
  • Environment


    LINUX   BLT32 25 MBytes/s
    MBLT64 50 MBytes/s
    2eVME >80 MBytes/s(*)
    Readout from SDRAM 80 MBytes/s
    DSP VME single cycle 600 ns/cycle
    measured with CI80 memory as VME slave
    (*) measured with SIS3300 FADC as VME slave
    Win2K/NI CVI D32 5 µs/longword
    mapped D32 read access 3 µs/longword
    pipelined D32 write access 700ns/longword
    MBLT64 read 40 MBytes/s
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    2eVME transfer scope shot

    upper trace: DS1, lower trace: DTACK

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  • SIS9200 DSP piggy pack as histogrammer
  • 64/128/256/512 MB slave/histogramming memory
  • Front panel I/O option

  • 4 flat cable inputs/4 flat cable outputs (ECL or high impedance TTL)
  • 3 LEMO inputs/3 LEMO outputs (50 Ohm TTL or NIM level)
  • LEMO reset output (50 Ohm TTL or NIM level)
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    Block diagram of VME side:

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    Properties of PCI/cPCI side:

    The PCI (SIS1100) side consists of two printed circuit boards. The first board is a CMC carrier board (SIS1100-CMC or SIS1100-cCMC) with a PLX 9054 PCI master bridge chip a FPGA and glue logic, like boot circuitry, the second card is the CMC optical link mezaninne card (SIS1100-OPT).

    Features of SIS1100-OPT

  • Link part as identical copy of VME side
  • LED's on SIS1100-OPT

    A (access) L (link up)
    LU (link data up) LD (link data down)
    U (user) spare

  • Option: 2 LEMO TTL in and 2 LEMO TTL (50 Ohm) outputs
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    Software support:

  • LINUX driver (Kernel 2.4.4 or higher required)
  • LINUX driver

  • Multiple interface Windows XP/Windows 7/Windows 8 driver/API

  • spec support
  • Certified Scientific Software logo Certified link

  • KMAX support
  • KMAX logo KMAX link

  • NI CVI/Labview support
  • IDL support (for SIS3300 digitizer)
  • IDL logo

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    Front panel design

    Find below the front panel designs of the standard module (left hand side) and the design with front panel I/O option (right hand side)

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