SIS8300 and SIS8300-L Firmware and MMC revision page

SIS8300 V1 Generic Firmware Revision Table
Design Name Major Revision # Minor Revision # Description MCS File
SIS8300 20.10.10 01 03 First official release V0103
SIS8300 V1 Firmware Revision Table

SIS8300 V2 Generic Firmware Revision Table
Design Name Major Revision # Minor Revision # Description MCS File
SIS8300 V2 0x11 0x02 Current release SIS8300V2 V1102
SIS8300 V2 0x14 0x00 New release w. histogramming memory controller for Virtex 5 SX SIS8300V2 SX V1400
SIS8300 V2 0x14 0x02 DAQ done IRQ, fixes SIS8300V2 LX V1402
SIS8300 V2 0x24 0x03 8 channel 250 MSPS 14-bit SIS8300V2 LX V2403
SIS8300 V2 Firmware Revision Table

Note: The connection between the Serial PROM and the FPGA on the SIS8300 uses 8-bit parallel mode. You will want to check the 'Parallel Load' box in Impact when specifying the programming properties for the PROM.

SIS8300 L Generic Firmware Revision Table
Design Name Major Revision # Minor Revision # Description MCS File
SIS8300 L 10 09 Current release for SIS8900 RTM V1009 for SIS8900
SIS8300 L 20 09 Current release for DWCx RTMs V2009 for DWC
SIS8300 L Firmware Revision Table

SIS8300 MMC Revision Table
Hardware Version Date Description HEX File
SIS8300 V2 V2.7.1 09.09.2013 obsolete SIS8300 V2 V2.7.1
SIS8300-L V2.7.1 09.09.2013 obsolete SIS8300-L V2.7.1
SIS8300 V2 V2.7.2 19.06.2014 obsolete SIS8300 V2 V2.7.2
SIS8300-L V2.7.2 19.06.2014 obsolete SIS8300-L V2.7.2
SIS8300 V2 V2.7.3 16.10.2014 use 2.7.4 SIS8300 V2 V2.7.3
SIS8300-L V2.7.3 16.10.2014 use 2.7.4 SIS8300-L V2.7.3
SIS8300 V2 V2.7.4 20.10.2014 Current release, rev. bit readout point in time change SIS8300 V2 V2.7.4
SIS8300-L V2.7.4 20.10.2014 Rev. bit readout point in time change SIS8300-L V2.7.4
SIS8300-L V2.7.5 24.08.2016 Current release, DWC8VM1LF RTM Support SIS8300-L V2.7.5
SIS8300 MMC Revision Table