SIS3320 Firmware revision Page
| Design Name | Major Revision # | Minor Revision # | Description | MCS File |
|---|---|---|---|---|
| SIS33200102 | 01 | 02 | Initial Release | - |
| SIS33200106 | 01 | 06 | Random external clock mode | |
| SIS33200109 | 01 | 09 | J/K bug fix acquisition register | |
| SIS3320010A | 01 | 0A | Current | sis3320_v010a.mcs |
| SIS3320010B | 01 | 0B | SumG and P extension from 5 to 8-bit | sis3320_v010b.mcs |
| SIS3320 Generic Firmware Revision Table | ||||
| Design Name | Major Revision # | Minor Revision # | Description | MCS File |
|---|---|---|---|---|
| SIS332002004 | 20 | 04 | Current | sis3320_v2004.mcs |
| SIS3320-250 Generic Firmware Revision Table | ||||
| Design Name | Major Revision # | Minor Revision # | Description | MCS File |
|---|---|---|---|---|
| SIS332003103 | 31 | 03 | Current | sis3320_v3103.mcs |
| SIS3320-250 n/Gamma Firmware Revision Table | ||||
JTAG firmware upgrade procedure
The firmware of the SIS3320 can be ugraded with a XILINX JTAG USB programmer from a Windows PC (XILINX part number HW-USB-II-G-JTAG, Struck part number 02950). Firmware upgrade over VME is supported also.
