################################################################################
##   ____  ____
##  /   /\/   /
## /___/  \  /    Vendor: Xilinx
## \   \   \/     Version : 1.12
##  \   \         Application : Virtex-6 FPGA GTX Transceiver Wizard
##  /   /         Filename : planAhead_ise.tcl 
## /___/   /\     
## \   \  /  \
##  \___\/\___\
##
##
## planAhead_ise.tcl script 
## Generated by Xilinx Virtex-6 FPGA GTX Transceiver Wizard
##
##
## (c) Copyright 2009-2011 Xilinx, Inc. All rights reserved.
##
## This file contains confidential and proprietary information
## of Xilinx, Inc. and is protected under U.S. and
## international copyright and other intellectual property
## laws.
##
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## rights to the materials distributed herewith. Except as
## otherwise provided in a valid license issued to you by
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## WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
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##
## CRITICAL APPLICATIONS
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## PART OF THIS FILE AT ALL TIMES.
##
##
################################################################################

## Environment Setup
set projDir  [file dirname [info script]]
set projName v6_gtx_dual_sfp_112
set topName  v6_gtx_dual_sfp_112_top
set device   xc6vlx130t-ff1156-2

## if the project directory exists, delete it and create a new clean one
if {[file exists $projDir/$projName]} {
file delete -force $projDir/$projName
}

## Create Project
create_project $projName $projDir/$projName -part $device

## Project Option
set_property design_mode RTL [get_filesets sources_1]

## Source Files
add_files -norecurse ../example_design/mgt_usrclk_source_mmcm.vhd
add_files -norecurse ../example_design/frame_gen.vhd
add_files -norecurse ../example_design/frame_check.vhd
add_files -norecurse ../../v6_gtx_dual_sfp_112_gtx.vhd
add_files -norecurse ../../v6_gtx_dual_sfp_112.vhd
add_files -norecurse ../example_design/v6_gtx_dual_sfp_112_top.vhd

## UCF Files
import_files -fileset [get_filesets constrs_1] -force -norecurse ../example_design/v6_gtx_dual_sfp_112_top.ucf
import_files -fileset [get_filesets constrs_1] -force -norecurse ../example_design/gtx_attributes.ucf

## NGC Files
import_files -fileset [get_filesets sources_1] -force -norecurse ../implement/data_vio.ngc 
import_files -fileset [get_filesets sources_1] -force -norecurse ../implement/ila.ngc 
import_files -fileset [get_filesets sources_1] -force -norecurse ../implement/icon.ngc
 
 

## Set the Top module
set_property top $topName [get_property srcset [current_run]]

## Run Synthesis
launch_runs -runs synth_1
wait_on_run synth_1

## Run Implementation
set_property strategy {ISE Defaults} [get_runs impl_1]


#config_run -run impl_1 -program par -option -ol -value high

launch_runs -runs impl_1
wait_on_run impl_1

## Run BitGen
set_property add_step Bitgen [get_runs impl_1]
launch_runs -runs impl_1
wait_on_run impl_1

exit
## End
