The SIS3808 is a specialised multiscaler implementation on the base of the SIS38xx/360x base board. It combines SIS3801 properties with a programmable after pulse deadtime to avoid multiple counts for a single signal with correlated follow up pulses (as generated by some types of PMTs). Due to FPGA cell limitations the channel depth is limited to 20-bits in this design. The deadtime can be programmed in 128 steps of 100 ns, 200ns or 400 ns (different firmware designs) from some 500 ns to the corresponding maximum delay (13.3 µs in the 100 ns case e.g.). While the deadtime value is common to all channels, the deadtime is applied to the individual channel upon a hit (i.e. a hit in one of the channels does not impose deadtime on the other 31 channels). The multiscaler is designed for experiments with the need to measure counting rates with fixed or variable time intervals. The counter data are stored in a synchronous FIFO, thus readout can take place in parallel to the acquisition of new data. The scaler is a single width 6U VME card, no non standard voltages are required. The unit comes with a 20 pin header connector for the control section and two 34 pin headers for the counters (ECL and flat cable TTL version) or via 8 LEMO connectors for the control section and 32 LEMOs for the counter section (NIM and LEMO TTL version). Photograph of the (basically identical SIS3801) flat cable/LEMO version.
![]() 32 channels |
![]() Minimum dwell time 4µs |
![]() 20-bit channel depth (with 24/32-bit non deadtimed designs) |
![]() Broadcast Features |
![]() up to 200 MHz (in non deadtimed mode) |
![]() VME64x Connectors |
![]() 2 scaler banks |
![]() VME64x Side Shielding |
![]() 64/256 (optional) K FIFO size |
![]() A16/A24/A32 D16/D32/BLT32 |
![]() Global count disable |
![]() VME Access/user LED |
![]() Deadtime programmable in 128 steps |
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![]() 100 ns, 200 ns or 400 ns deadtime steps |
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![]() copy in progress ouput |
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