SIS9200 SHARC Piggy Back

Properties of the SHARC DSP piggy back

ADSP-21062L KS-160 SHARC DSP

256K x 48-bit RAM

On board FLASHPROM

+5 V single supply (3.3 V generation by linear regulator)

mainly 3.3 V low power design

Boot options:

FLASHPROM

Host (via RAM)

Noboot (via external memory)

JTAG (not tested yet)

Block Diagram:

Photographs:

Applications:

List processor on SIS3100