The SIS3400 VME board is designed for continuous time measurements with time bin lengths down to 50 ns. The primary focus of the card is on the readout of Neutron Time of Flight spectrometers with up to 1152 detector channels in a single crate VME system. Other applications comprise trigger time stamping as well as arbitrary medium resolution long term processes. The module is a single width (4 TE), 6U VME card, the inputs are implemented with 50 Ohm impedance metric coax. connectors with TTL input level. In the Neutron TOF readout application case the front end logic stores 64-bit words with one or more bit status changes in a derandomizer FIFO. In parallel the time stamp is stored in a time stamp FIFO. The event formatting logic can be operated in different modes. In single word mode it extracts bits with status change, and converts the bit and board number into a unique address, which is stored in a 32-bit wide ouput word together with the 20-bit time stamp. Time slices with n bit changes result in n 32-bit words written to the cards ouput FIFO. The VME CPU can gather data from the ouput FIFOs upon the FIFO not empty or FIFO half full condition, depending on the overall system design this can be done with FIFO interrupt handling or polling.
64 channels |
metric coax. input connectors |
20-bit time bin counter with wrap around counter (32-bit with firmware 0xB)) |
TTL input levels |
Leading Edge/Trailing Edge |
FIFO and wrap around interrupts |
Derandomiser FIFO |
VME64x Connectors |
Output FIFO |
VME64x Side Shielding |
external/internal clock |
VME64x Front panel |
external/internal software inhibit |
VME64x extractor handles (on request) |
external/software time reset/zero |
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| Metric koax. connector input version: | |
| SCSI-2 connector input version: | |
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The unit is in compliance with the VME standard, it supports the following VME features:
A24/A32 D32/BLT32/BLT64
Base address A31-A24 settable via two rotary switches
VME64xP geographical addressing
VME64xP LED set (PAR)
VME64xP hot swap
8 LEDs are implemented to visualise the board status.
VME Access
Power
Ready (logic configured)
User (set/cleared under program control)
Disable (or of external/internal disable)
Derandomiser FIFO overflow(error condition)
Output FIFO overflow (error condition)
Event (time slice with bit change)
