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Tag Archives: Digitizer
GBit/s Ethernet readout of a 16 channel SIS3316 125/250 MSPS digitizer yields a block transfer throughput in excess of 80 MByte/s. Parallel readout of multiple SIS3316s over a 10 GBit/s (10G) switch into a computer with 10G Ethernet card is … Continue reading
Custom firmware was developed for the 16 channel SIS3316 250 MSPS 14-bit digitizer for a n/Gamma separation with firmware TOF (time of flight) histogramming capability. The user can configure the gates to be histogrammed. Both readout over VME and Ethernet … Continue reading
New SIS3316 firmware online under struck.de/sis3316firm.html . Featuring fully licensed Ethernet core and external bank switch. release related to Firmware Versions – VME FPGA: V3316-2003 (0x33162003) – ADC FPGAs: V0250-0003 (0x02500003) Bug fixes: – UDP read of ADC FPGA Status … Continue reading
The 2nd major revision of the SIS3316 firmware is online under www.struck.de/sis3316firm.html. Besides bug fixes it offers GBit Ethernet functionality and a dual threshold mechanism.
The 6th ATCA /MicroTCA for Physics Workshop was held prior to the Berkeley 2012 IEEE RT conference. The MTCA.4 RTMs for Generic Fast ADC-DAC is online here.
User firmware designs for the 8 channel 1.25 GSPS 10-bit SIS3305 digitizer can be based on the new framwork. The user has access to the data stream from the ADC chip and control over the memory controller. The VME interface provides 16 registers … Continue reading
We are about to double the channel density per single width VME card with the SIS3316 high speed high resolution digitizer design. The two members of the new family are: SIS3316-14-250 the 250 MSPS 14-bit card SIS3316-16-125 the 125 MSPS … Continue reading
A preprint with the description of the use of the SIS3301 VME digitizers in the data acquisition chain of the liquid Xenon LUX Dark Matter detector was released on August 11th. 2011. A total of 122 PMTs is read out … Continue reading
Please go to sis8300firm.html to access the current 0x1102 firmware for the V2 hardware design. The underlying FPGA VHDL project will be made available on request. A user DMA interface as well as the possiblity to generate interrupts from user firmware … Continue reading
The SIS8900 will be a single ended 50 Ohm impedance analog input RTM for the SIS8300 digitizer. Have a look at www.struck.de/sis8900.html also.