Category Archives: Firmware

XC18V04 Serial Prom IDCODE not recognized by Impact

SIS3100, SIS3300, SIS3301 SIS3820 and several other Struck boards use the Xilinx XC18V04 Serial PROM to hold the firmware that is uploaded to the FPGA at power up. Depending on the Impact version and the Silicon of the XC18V04  you may get … Continue reading

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SIS8300-L2 Firmware with PME_turn_off Workaround

The (non AXI) PCI Express endpoint of the Virtex 6 can be rendered inaccessible after a PME_turn_off command (from a CPU reboot). A core reset was added to the pcie_interface.vhd as a workaround in that situation with minor firmware revision … Continue reading

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TAMU SHE SIS3316 Si/YAP Readout Using HE and Trigger Mask Functionality

Super Heavy Element (SHE) production imposes stringent requirements on trigger generation. TAMU uses a set of four 16 channel 250 MSPS 14-bit SIS3316 digitizers to read out a setup consisting of YAP and Silicon detectors. An advanced triggering scheme utilizing the more recent … Continue reading

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SIS3316 and SIS3316-DT support for optical Ethernet

Optical decoupling of data acquisition devices from the readout system is mandatory in some applications (like installation on a platform under high voltage).  In case of the SIS3316(-DT) 125MSPS 16-bit and 250 MSPS 14-bit digitizers optical decoupling can be established … Continue reading

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SIS3316 new energy pickup index functionality

Ge detector preamplifier output signals tend to produce an overshoot at the beginning of the signal as shown in the scope screenshot below. This overshoot may vary in amplitude even for a fixed energy. A variation of the extracted energy … Continue reading

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SIS3820 Firmware with new LNE/CIP Features

Thanks to Mark Rivers from the University of Chicago for proposing  the incorporation of LNE/CIP delay, stretcher and invert functionality into the SIS3820 Multi Purpose Scaler firmware to facilitate the use of the LNE/CIP output to interface to external hardware. The … Continue reading

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SIS8300-L MLVDS Input/Output Control register firmware bug

MLVDS Input/Output Control register 0x12 below release 0x1007 has a copy&paste bug in the top level VHDL code, which is affecting triggering of MLVDS input 7. The bug is fixed in macro and synthesized versions from 0x1007 on. Thanks to … Continue reading

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n/Gamma separation and TOF histogramming with SIS3316

Custom firmware was developed for the 16 channel SIS3316 250 MSPS 14-bit digitizer for a n/Gamma separation with firmware TOF (time of flight) histogramming capability. The user can configure the gates to be histogrammed. Both readout over VME and Ethernet … Continue reading

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Averaging mode of operation for SIS3316 Digitizer

The option to average over 4, 8, 16, 32, 64, 128 and 256 samples for slower speed sampling at higher resolution was added to the SIS3316 firmware. SIS3316 averaging functionality short writeup

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Peak and Charge Sensing Mode of Operation Firmware for SIS3316 Digitizer

Peak and charge sensing ADC functionality with external gate was added to the SIS3316 firmware (limited to the 250 MSPS version for the time being). SIS3316 Peak and Charge sensing functionality short writeup 

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